The present invention relates to a power amplifier, especially protection for a power amplifier against fault conditions.
In a power amplifier system, it is desirable to avoid operation in fault modes, which could result in permanent damage of the system, especially power transistors. With designed protection circuits, the system may recover from fault conditions and resume normal operation without suffering any damage. In a conventional design, the protection circuits protect the power amplifier against any of the following fault conditions: a short at an output terminal to ground, a power supply, or another output terminal; an overload on the power output; an over-, or under-voltage of the power supply; overheating of the package. An example of such protection circuits is disclosed in U.S. Pat. No. 4,053,996.
FIG. 9 is a block diagram showing the protection for a conventional audio power amplifier. The power amplifier comprises an output block 2, an output terminal 3, a bias block 4, a standby pin 5, and a protection block 70.
The output block 2 includes two power transistors in series between a power supply (with a voltage VCC) and a ground. The output terminal 3 is connected between the two power transistors. The bias block 4 provides bias currents for other blocks, thereby biasing the other blocks in activated states, especially the two power transistors conductive. Then, a large amount of current flows through the power transistors and the output terminal 3, and thus power is provided for an outside load, such as a loudspeaker (not shown).
The protection block 70 includes a protection switch block 71, an ASO (Area-of-Safe-Operation) monitoring block 72, and a short-to-ground detection block 73. The protection switch block 71 controls the ON/OFF states of protection switches 7A, which are interposed between the output block 2 and the bias block 4, and allow (or prohibit) bias currents to flow (or from flowing, respectively). The ASO monitoring block 72 is designed to detect the operations of the power transistors outside their ASO. Here, the operations outside the ASO indicate an occurrence of the above-listed fault conditions of the power transistors, such as “a short to ground, power supply, or another output terminal” and “an overload”. The ASO monitoring block 72 monitors the operation of the output block 2 through the currents, voltages, and temperatures of the power transistors. When the currents or voltages exceed the limits of the ASO, which depends on the temperature, the ASO monitoring block 72 sends a signal to the protection switch block 71 (usually after a predetermined delay TD in order to avoid misoperations). Then, the protection switch block 71 turns off the protection switches 7A, and thus cuts off the bias currents for the output block 2. Accordingly, the power transistors are both confined in the OFF states regardless of the fault types. At the same time, the protection switch block 71 connects the short-to-ground detection block 73 to the bias block 4. Then, the short-to-ground detection block 73 is activated and monitors the potential of the output terminal 3 with respect to a ground. In the event of a short to ground at the output terminal 3, the short-to-ground detection block 73 continuously sends a signal to the protection switch block 71. Thereby, the protection switch block 71 maintains the protection switches 7A in the OFF states. Thus, the protection block 70 prevents permanent damage to the power transistors due to an overcurrent. When the short to ground is not detected or removed, the short-to-ground detection block 73 terminates the sending of the signal. Then, the protection switch block 71 turns on the protection switches 7A, thereby allowing the bias currents to flow to the output block 2. Thus, the power transistors are released and the power amplifier recovers the normal operation.
The above-described protection for the power transistors is effective during the normal operation of the power amplifier, since the currents and voltages of the output block 2 is so large that the ASO monitoring block 72 can easily and promptly detect the operation of the power transistors outside the ASO. However, a problem arises when a fault condition, for example, a short to ground at the output terminal 3 occurs during power-up as follows.
FIG. 10 is a timing chart showing the operations of the protection switches 7A, the protection switch block 71, the ASO monitoring block 72, and the short-to-ground detection block 73 during power-up, together with the level of the voltage VSTB at the standby pin 5 (see FIG. 9). In FIG. 10, high (or low) levels represent activated (or non-activated) states of the respective blocks. Here, the voltage VSTB at the standby pin 5 is supplied by an external device, such as a microcontroller, and its level rises at a predetermined rate during power-up. The bias block 4 monitors the level of the voltage VSTB during power-up, and does not provide the bias currents for the protection block 70 until the standby pin 5 is enough activated, that is, the level of the voltage VSTB reaches a predetermined level VON. Thereby, the protection block 70 avoids misoperations due to inrush currents and abrupt voltage rises. In particular, an audio power amplifier prevents a loudspeaker from reproducing an undesired noise (which is known as “popping noise”) at power-up. The arrangement of the standby pin 5 is an ordinary component of prior-art power amplifiers, especially audio power amplifiers.
The protection block 70 is maintained in a non-activated state after the time T0 when power-up starts, until the time TON when the voltage level VSTB of the standby pin 5 reaches the predetermined level VON. Accordingly, the ASO monitoring block 72 cannot detect the operations of the power transistors outside the ASO during the period from the time T0 to the time TON. Therefore, the protection switches 7A are maintained in the ON states during a period PON from the time T0 to the time when the delay TD has elapsed from the time TON. As such, in the event of a short to ground at the output terminal 3 at power-up, excessive currents may flow through the power transistors in the period PON, and a large amount of power may be dissipated in the power transistors. Unless removed within a very short period of time, this dissipation may cause permanent damages to the power transistors, and hence the power amplifier. Since the protection block 70 cannot promptly react to fault occurrences during power-up, it is difficult to reduce the risk of permanent damages to the power transistors.
In order to activate the protection block 70, especially the ASO monitoring block 72, at an earlier stage during power-up, the ASO monitoring block 72 is required to enlarge its detection range and enhance its detection accuracy, thereby ensuring its reliability during power-up. However, the ASO of the power transistor is tightly confined since the output block 2 is usually designed to have a size large enough to deliver sufficient power, while minimizing its chip area. Accordingly, the detection accuracy required of the ASO monitoring block 72 is very high for the normal operation of the power amplifier. In addition, when the power amplifier is designed as a monolithic IC, an area available for implementation of the ASO monitoring block 72 in itself is tightly confined. On the other hand, there is a limit to the accuracy of the design of the ASO monitoring block 72 due to parameter tolerances of wafer process. In a conventional design, the detection range of the ASO monitoring block 72 is confined to cover the operation ranges of the power transistors during the normal operation, thereby ensuring high accuracy of detection. Therefore, it is difficult for the ASO monitoring block 72 to achieve a larger detection range with higher detection accuracy suitable for a reliable protection for the output block 2 during power-up.